-rw-r--r-- 3215 saferewrite-20250228/unicorn-patch raw
diff --git a/include/unicorn/sparc.h b/include/unicorn/sparc.h index 776cd2cd..66f6b026 100644 --- a/include/unicorn/sparc.h +++ b/include/unicorn/sparc.h @@ -158,6 +158,8 @@ typedef enum uc_sparc_reg { // pseudo register UC_SPARC_REG_PC, // program counter register + UC_SPARC_REG_PSR, + UC_SPARC_REG_ENDING, // <-- mark the end of the list of registers // extras diff --git a/qemu/accel/tcg/cpu-exec.c b/qemu/accel/tcg/cpu-exec.c index 09148f1d..0642af14 100644 --- a/qemu/accel/tcg/cpu-exec.c +++ b/qemu/accel/tcg/cpu-exec.c @@ -397,6 +397,11 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) #if defined(TARGET_PPC) CPUPPCState *env = &(POWERPC_CPU(uc->cpu)->env); env->nip += 4; +#endif +#if defined(TARGET_SPARC) + CPUSPARCState *env = &(SPARC_CPU(uc->cpu)->env); + env->pc = env->npc; + env->npc += 4; #endif // Unicorn: call registered interrupt callbacks catched = false; diff --git a/qemu/accel/tcg/translate-all.c b/qemu/accel/tcg/translate-all.c index 3f6d2630..2f408a8a 100644 --- a/qemu/accel/tcg/translate-all.c +++ b/qemu/accel/tcg/translate-all.c @@ -1008,6 +1008,7 @@ void free_code_gen_buffer(struct uc_struct *uc) #else void free_code_gen_buffer(struct uc_struct *uc) { +return; TCGContext *tcg_ctx = uc->tcg_ctx; if (tcg_ctx->initial_buffer) { if (munmap(tcg_ctx->initial_buffer, tcg_ctx->initial_buffer_size)) { diff --git a/qemu/target/sparc/unicorn.c b/qemu/target/sparc/unicorn.c index 33ed8def..4d17fe13 100644 --- a/qemu/target/sparc/unicorn.c +++ b/qemu/target/sparc/unicorn.c @@ -80,6 +80,9 @@ uc_err reg_read(void *_env, int mode, unsigned int regid, void *value, } else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) { CHECK_REG_TYPE(uint32_t); *(uint32_t *)value = env->regwptr[16 + regid - UC_SPARC_REG_I0]; + } else if (regid == UC_SPARC_REG_PSR) { + CHECK_REG_TYPE(uint32_t); + *(uint32_t *)value = env->psr; } else { switch (regid) { default: @@ -114,6 +117,9 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value, } else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) { CHECK_REG_TYPE(uint32_t); env->regwptr[16 + regid - UC_SPARC_REG_I0] = *(uint32_t *)value; + } else if (regid == UC_SPARC_REG_PSR) { + CHECK_REG_TYPE(uint32_t); + env->psr = *(uint32_t *)value; } else { switch (regid) { default: diff --git a/qemu/util/oslib-posix.c b/qemu/util/oslib-posix.c index 615e477e..b58a26f5 100644 --- a/qemu/util/oslib-posix.c +++ b/qemu/util/oslib-posix.c @@ -188,6 +188,8 @@ static void *qemu_ram_mmap(struct uc_struct *uc, void *guardptr; void *ptr; +return malloc(size); + /* * Note: this always allocates at least one extra page of virtual address * space, even if size is already aligned. @@ -271,6 +273,8 @@ static void qemu_ram_munmap(struct uc_struct *uc, void *ptr, size_t size) { size_t pagesize; +return; + if (ptr) { /* Unmap both the RAM block and the guard page */ #if defined(__powerpc64__) && defined(__linux__)